Principal Analog Mixed Signal Designer

Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries. You have spent years designing analog circuits that operate at the edge of what silicon can do, and you understand that a 224G SerDes is not just fast logic, it is a system of tradeoffs between power, jitter, linearity, and layout parasitics that all have to resolve correctly on the first pass. You know the difference between a PLL that locks in simulation and one that actually works across corners, temperature, and supply variation in a real package. Responsibilities Define analog sub-block specifications for 224G and 448G PAM4 SerDes IP based on PCIe, Ethernet, and emerging industry standards Design and optimize circuit topologies for PLLs, CTLE and DFE equalizers, bang-bang and Mueller-Muller CDRs, and voltage or current-mode transmit drivers in advanced FinFET nodes Run transistor-level simulations in SPICE tools including corner sweeps, Monte Carlo analysis, and aging verification to ensure margin across all operating conditions Collaborate directly with layout engineers to control parasitics, manage signal routing, and maintain signal integrity in high-speed differential paths Present simulation results, design tradeoffs, and performance summaries to internal engineering teams and external customers during IP reviews Document circuit functionality, verification coverage, and integration test plans for handoff to digital and mixed-signal verification teams Perform hands-on lab characterization of SerDes silicon, analyze measurement data to isolate issues, determine root causes, and develop practical workarounds or design updates for the next revision Requirements PhD with 5+ years or Master's with 8+ years of hands-on analog IC design experience in Electrical Engineering, Computer Engineering, or a related field Deep transistor-level circuit design expertise with strong CMOS fundamentals and proven ability to design for performance, power, and area in advanced nodes Detailed design experience with at least two of the following SerDes sub-circuits: receive equalizers, samplers, voltage or current-mode drivers, serializers, deserializers, VCOs, phase mixers, DLLs, PLLs, bandgap references, ADCs, or DACs, and working familiarity with several others Proficiency with SPICE simulators and simulation methodologies including transient, AC, noise, and statistical analysis Experience with schematic entry, physical layout tools, and design verification flows used in custom analog IC development Knowledge of Verilog-A for analog behavioral modeling and simulation control or data capture is a plus Experience with scripting in TCL, Perl, Python, MATLAB, or C to automate simulation, analysis, or post-processing is desired Job Data by YubHub .