ASIC-PD Engineer

NVIDIA · Hsinchu, Taiwan As an ASIC-PD engineer at NVIDIA, you'll work on the physical design of digital chips, focusing on high frequency, low power consumption, and multiple applications. Your responsibilities include: Chip integration and netlist generation Synthesis, RTL/netlist quality check, and formal verification Constraints creation and validation, timing budget Collaborating with the ASIC team to resolve timing issues and implement chip partitioning and floorplan Achieving timing closure for both partition and full chip levels Special mode timing closure, such as io, test, clock, async Function eco creation Developing and improving the entire timing closure flow from frontend to backend Flow automation development To succeed in this role, you should have: MS in EE or Microelectronics Project experience in IC design implementation Courses taken in circuit design, digital design Hands-on experience with EDA software from Synopsys (DC/PT/Formality), Cadence (RC compiler/LEC) Proficiency in Python or TCL Proficient in English reading and writing