Analog Design Staff Engineer

Synopsys · Bengaluru, Karnataka Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries. You have spent years designing analog circuits that have to perform under real-world conditions, not just pass simulation. High-speed IO is where you live, and you understand that the difference between a PHY that meets spec and one that ships in volume comes down to the choices you make at the transistor level. You know device physics well enough to predict how a circuit will behave in a new process node before the PDK is fully characterized, and you have debugged enough silicon to know that the layout always matters more than people think. What You'll Be Doing Design and develop high-speed IO circuits for next-generation memory interface PHY IPs including DDR, HBM, and UCIe in advanced CMOS, FinFET, and GAA process nodes Execute circuit design tasks from architecture through layout, simulation, and verification with a focus on performance, power, and area optimization Analyze and solve complex analog design challenges in advanced technology nodes where device behavior and parasitics significantly impact circuit performance Collaborate with global cross-functional teams including digital design, verification, layout, and product engineering to deliver integrated PHY solutions Apply ESD and reliability principles to ensure robust circuit design that meets product quality and long-term performance requirements Work within JEDEC specifications and memory interface standards to ensure compliance and interoperability across customer platforms Support silicon bring-up, characterization, and debug activities to validate design performance and drive continuous improvement The Impact You Will Have Enable customers to integrate cutting-edge memory interfaces into their SoCs, directly affecting performance and power efficiency of next-generation AI, compute, and mobile products Contribute to Synopsys Silicon IP portfolio that powers the world's most advanced semiconductor designs across multiple market segments Deliver PHY IP blocks that reduce customer time-to-market and de-risk their product development in the most challenging process nodes Influence the architecture and design methodology for future generations of high-speed memory interfaces used globally Help establish design best practices and circuit techniques that will be reused across multiple product lines and technology nodes Drive quality and performance standards that define what competitive memory PHY IP looks like in the market Support the success of customer tape-outs by delivering IP that works the first time and scales across process variants What You'll Need Bachelor's or Master's degree in Electronics Engineering, Electrical Engineering, or related field 5 to 10 years of hands-on analog circuit design experience with demonstrated expertise in high-speed IO design Deep understanding of analog design fundamentals including device physics, transistor-level design, and circuit analysis Proven experience designing circuits in advanced technology nodes such as CMOS, FinFET, or GAA processes Strong analytical and problem-solving skills with the ability to debug complex analog and mixed-signal issues Knowledge of ESD protection schemes and reliability considerations in analog circuit design Experience with JEDEC memory interface standards (DDR, HBM, LPDDR) or familiarity with signal integrity and power integrity concepts is a plus Benefits Comprehensive medical and healthcare plans that work for you and your family Time away: In addition to company holidays, we have ETO and FTO Programs Family support: Maternity and paternity leave, parenting resources, adoption and