Silicon Validation Lead, Principal Engineer

Synopsys · Sunnyvale, California · $193200-$289800 We are seeking a highly skilled Silicon Validation Lead, Principal Engineer to join our team at Synopsys. As a key member of our Enterprise SerDes R&D team, you will lead silicon validation of IP functionality and performance, ensuring alignment with architectural intent. You will also support hardware bring-up and firmware integration for early product-version characterization. Responsibilities: Lead silicon validation of IP functionality and performance Support hardware bring-up and firmware integration for early product-version characterization Drive root-cause analysis, workarounds, and fixes for issues uncovered during characterization Manage a dedicated validation effort in parallel with characterization activities Validate sim-to-silicon performance of algorithms, impairments, and key metrics Provide feedback to system teams for hardware-correlated models and performance tuning Develop improvements to SerDes algorithms and configurations to address performance gaps Incorporate learnings from customer evaluation boards into future developments Review firmware regression tests for repeatability, drift, and robustness Support customer bring-up and drive resolution of silicon debug issues Communicate findings to Platform Architects and Product Owners for continuous platform improvement Requirements: BSc or MSc in Electrical or Computer Engineering 10+ years of experience in silicon validation, high-speed interfaces, and system-level performance analysis Expertise in SerDes design and validation, including PCIe/Ethernet protocols Strong knowledge of signal integrity, equalization, coding, and CDR architectures Hands-on experience with lab validation, debug tools, and sim-to-silicon correlation Familiarity with firmware integration and regression testing methodologies Benefits: Comprehensive health, wellness, and financial benefits Competitive salaries Annual bonus, equity, and other discretionary bonuses